Zainalabedin, K.: search on Z-Library

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1

Compiling gate RC models into a top level simulation model for rough timing analysis of VLSI circuits

Zainalabedin Navabi

Journal:

Microprocessors and Microsystems

Year:

1991

Language:

english

File:

PDF, 723 KB

english, 1991

2

[IEEE Technology of Integrated Systems in Nanoscal Era (DTIS) - Cairo, Egypt (2009.04.6-2009.04.9)] 2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era - TLM 2.0 simple sockets synthesis to RTL

Hatami, Nadereh, Ghofrani, Amirali, Prinetto, Paolo, Navabi, Zainalabedin

Year:

2009

Language:

english

File:

PDF, 1.32 MB

english, 2009

3

Digital System Test and Testable Design ||

Navabi, Zainalabedin

Year:

2011

Language:

english

File:

PDF, 18.03 MB

english, 2011

4

[IEEE 2019 IEEE East-West Design & Test Symposium (EWDTS) - Batumi, Georgia (2019.9.13-2019.9.16)] 2019 IEEE East-West Design & Test Symposium (EWDTS) - Making System Level Test Possible by a Mixed-mode, Multi-level, Integrated Modeling Environment

Nosrati, Nooshin, Basharkhah, Katayoon, Sadeghi, Rezgar, Zivkovic, Carna, Grimm, Christoph, Navabi, Zainalabedin

Year:

2019

Language:

english

File:

PDF, 3.15 MB

english, 2019

5

[IEEE 2007 IEEE International Symposium on Circuits and Systems - New Orleans, LA, USA (2007.05.27-2007.05.30)] 2007 IEEE International Symposium on Circuits and Systems - A New Approach for Design and Verification of Transaction Level Models

Kakoee, Mohammad Reza, Shojaei, Hamid, Ghasemzadeh, Hassan, Sirjani, Marjan, Navabi, Zainalabedin

Year:

2007

Language:

english

File:

PDF, 360 KB

english, 2007

6

[IEEE 2019 IEEE East-West Design & Test Symposium (EWDTS) - Batumi, Georgia (2019.9.13-2019.9.16)] 2019 IEEE East-West Design & Test Symposium (EWDTS) - From Abstract Modeling of ADAS Applications to an Accelerator-based Hardware Realization

Farsani, Samira Ahmadi, Basharkhah, Katayoon, Mohaghegh, Amin, Navabi, Zainalabedin

Year:

2019

File:

PDF, 3.54 MB

2019

7

Self-Healing Many-Core Architecture: Analysis and Evaluation

Kamran, Arezoo, Navabi, Zainalabedin

Journal:

Year:

2016

Language:

english

File:

PDF, 2.11 MB

english, 2016

8

[Society of Petroleum Engineers Middle East Oil Show and Conference - Bahrain (1997-03-15)] Middle East Oil Show and Conference - A New Technique to Correct Slim Hole Through-Tubing Carbon-Oxygen Logs for Re-Invasion Effects, for Re-Invasion Effects

Al-Behair, A., Al-Hajari, A., Zainalabedin, K., Minh, C. Cao

File:

PDF, 502 KB

9

[IEEE 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Miami, FL, USA (2019.7.15-2019.7.17)] 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - An ESL Environment for Modeling Electrical Interconnect Faults

Nosrati, Nooshin, Basharkhah, Katayoon, Sadeghi, Rezgar, Navabi, Zainalabedin

Year:

2019

Language:

english

File:

PDF, 176 KB

english, 2019

10

LUT Input Reordering to Reduce Aging Impact on FPGA LUTs

Ebrahimi, Mohammad, Sadeghi, Rezgar, Navabi, Zainalabedin

Journal:

IEEE Transactions on Computers

Year:

2020

Language:

english

File:

PDF, 4.46 MB

english, 2020

11

[IEEE 13th IEEE International On-Line Testing Symposium (IOLTS 2007) - Crete, Greece (2007.07.8-2007.07.11)] 13th IEEE International On-Line Testing Symposium (IOLTS 2007) - An Analytical Model for Reliability Evaluation of NoC Architectures

Dalirsani, Atefe, Hosseinabady, Mohammad, Navabi, Zainalabedin

Year:

2007

Language:

english

File:

PDF, 318 KB

english, 2007

12

[IEEE 2010 15th IEEE European Test Symposium (ETS) - Praha, Czech Republic (2010.05.24-2010.05.28)] 2010 15th IEEE European Test Symposium - A reconfigurable online BIST for combinational hardware using digital neural networks

Hosseini, S. Behdad, Shahabi, Ali, Sohofi, Hassan, Navabi, Zainalabedin

Year:

2010

Language:

english

File:

PDF, 653 KB

english, 2010

13

[IEEE 25th IEEE VLSI Test Symmposium - Berkeley, CA, USA (2007.05.6-2007.05.10)] 25th IEEE VLSI Test Symmposium (VTS'07) - A UML Based System Level Failure Rate Assessment Technique for SoC Designs

Hosseinabady, Mohammad, Neishaburi, M.H., Lotfi-Kamran, Pejman, Navabi, Zainalabedin

Year:

2007

Language:

english

File:

PDF, 473 KB

english, 2007

14

[IEEE 2006 15th Asian Test Symposium - Fukuoka, Japan (2006.11.20-2006.11.20)] 2006 15th Asian Test Symposium - An Optimum ORA BIST for Multiple Fault FPGA Look-Up Table Testing

Alaghi, Armin, Yarandi, Mahnaz, Navabi, Zainalabedin

Year:

2006

Language:

english

File:

PDF, 301 KB

english, 2006

15

Digital Design and Implementation with Field Programmable Devices || Sequential Multiplier

Navabi, Zainalabedin

Year:

2005

Language:

english

File:

PDF, 695 KB

english, 2005

16

[IEEE 2016 IEEE East-West Design & Test Symposium (EWDTS) - Yerevan, Armenia (2016.10.14-2016.10.17)] 2016 IEEE East-West Design & Test Symposium (EWDTS) - ESL design with RTL-verified predesigned abstract communication channels

Haghi, Hamed Najafi, Chupilko, Mikhail, Kamkin, Alexander, Navabi, Zainalabedin

Year:

2016

Language:

english

File:

PDF, 622 KB

english, 2016

17

[IEEE 2012 IEEE International Test Conference (ITC) - Anaheim, CA, USA (2012.11.5-2012.11.8)] 2012 IEEE International Test Conference - BS 1149.1 extensions for an online interconnect fault detection and recovery

Sadeghi-Kohan, Somayeh, Namaki-Shoushtari, Majid, Javaheri, Fatemeh, Navabi, Zainalabedin

Year:

2012

Language:

english

File:

PDF, 435 KB

english, 2012

18

[IEEE Test Symposium (EWDTS) - Lviv, Ukraine (2008.10.9-2008.10.12)] Proceedings of IEEE East-West Design & Test Symposium (EWDTS'08) - An IEEE 1500 compatible wrapper architecture for testing cores at transaction level

Refan, Fatemeh, Prinetto, Paolo, Navabi, Zainalabedin

Year:

2008

Language:

english

File:

PDF, 349 KB

english, 2008

19

[IEEE 2007 International Conference on Design & Technology of Integrated Systems in Nanoscale Era - Rabat, Morocco (2007.09.2-2007.09.5)] 2007 International Conference on Design & Technology of Integrated Systems in Nanoscale Era - Assignment coverage, a complementary coverage metric in formal verification

Nabi, Majid, Shojaei, Hamid, Mohammadi, Siamak, Navabi, Zainalabedin

Year:

2007

Language:

english

File:

PDF, 869 KB

english, 2007

20

[IEEE 2015 Iran Workshop on Communication and Information Theory (IWCIT) - Tehran, Iran (2015.5.6-2015.5.7)] 2015 Iran Workshop on Communication and Information Theory (IWCIT) - Perfect interference alignment utilizing channel structure

Samadi, Zainalabedin, Tabatavakili, Vahid, Haddadi, Farzan

Year:

2015

Language:

english

File:

PDF, 352 KB

english, 2015

21

Digital Design and Implementation with Field Programmable Devices || Programmable Logic Devices

Navabi, Zainalabedin

Year:

2005

Language:

english

File:

PDF, 2.22 MB

english, 2005

22

[IEEE 2017 IEEE International High-Level Design Validation and Test Workshop (HLDVT) - Santa Cruz, CA (2017.10.5-2017.10.6)] 2017 IEEE International High Level Design Validation and Test Workshop (HLDVT) - A novel SAT-based ATPG approach for transition delay faults

Zokaee, Farzaneh, Sabaghian-Bidgoli, Hossein, Janfaza, Vahid, Behnam, Payman, Navabi, Zainalabedin

Year:

2017

Language:

english

File:

PDF, 916 KB

english, 2017

23

A New Approach for Automatic Test Pattern Generation in Register Transfer Level Circuits

Mirzaei, Mohammad, Tabandeh, Mahmoud, Alizadeh, Bijan, Navabi, Zainalabedin

Journal:

IEEE Design and Test

Year:

2013

Language:

english

File:

PDF, 453 KB

english, 2013

24

[IEEE 2014 27th International Conference on VLSI Design - India (2014.01.5-2014.01.9)] 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems - Configurable Systolic Matrix Multiplication

Kamranfar, Parastoo, Shahabi, S. Ali, Vazhbakht, Ghazaleh, Navabi, Zainalabedin

Year:

2014

File:

PDF, 833 KB

2014

25

[IEEE Test Symposium (EWDTS) - St. Petersburg, Russia (2010.09.17-2010.09.20)] 2010 East-West Design & Test Symposium (EWDTS) - Merit based directed random test generation (MDRTG) scheme for combinational circuits

Kamran, Arezoo, Jahangiry, Mohammad Saeed, Navabi, Zainalabedin

Year:

2010

Language:

english

File:

PDF, 434 KB

english, 2010

26

[IEEE 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Amsterdam, Netherlands (2014.10.1-2014.10.3)] 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Preemptive multi-bit IJTAG testing with reconfigurable infrastructure

Keshavarz, Shahrzad, Nekooei, Amirreza, Navabi, Zainalabedin

Year:

2014

File:

PDF, 195 KB

2014

27

[Society of Petroleum Engineers Middle East Oil Show and Conference - (1997.03.15-1997.03.18)] Proceedings of Middle East Oil Show and Conference - Hydrocarbon Detection in Low-Contrast Resistivity Pay Zones, Capillary Pressure and ROS determination with NMR logging in Saudi Arabia

Hassoun, T.H., Zainalabedin, K., Minh, C.

Year:

1997

File:

PDF, 1.33 MB

1997

28

[IEEE 21st International Conference on VLSI Design (VLSID 2008) - Hyderabad, India (2008.01.4-2008.01.8)] 21st International Conference on VLSI Design (VLSID 2008) - Enhanced TED: A New Data Structure for RTL Verification

Lotfi-Kamran, Pejman, Massoumi, Mehran, Mirzaei, Mohammad, Navabi, Zainalabedin

Year:

2008

Language:

english

File:

PDF, 1.50 MB

english, 2008

29

[IEEE Test Symposium (EWDTS) - Lviv, Ukraine (2008.10.9-2008.10.12)] Proceedings of IEEE East-West Design & Test Symposium (EWDTS'08) - Utilizing HDL simulation engines for accelerating design and test processes

Farajipour, Najmeh, Hosseini, S. Behdad, Navabi, Zainalabedin

Year:

2008

Language:

english

File:

PDF, 100 KB

english, 2008

30

[IEEE 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC) - Istanbul, Turkey (2013.10.7-2013.10.9)] 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC) - Online periodic test mechanism for homogeneous many-core processors

Kamran, Arezoo, Navabi, Zainalabedin

Year:

2013

Language:

english

File:

PDF, 299 KB

english, 2013

31

[IEEE 2014 19th IEEE European Test Symposium (ETS) - Paderborn, Germany (2014.5.26-2014.5.30)] 2014 19th IEEE European Test Symposium (ETS) - Automatic correction of certain design errors using mutation technique

Behnam, Payman, Alizadeh, Bijan, Navabi, Zainalabedin

Year:

2014

Language:

english

File:

PDF, 205 KB

english, 2014

32

[IEEE 2008 International Biennial Baltic Electronics Conference (BEC2008) - Tallinn (2008.10.6-2008.10.8)] 2008 11th International Biennial Baltic Electronics Conference - Application specific configuration of a fault-tolerant NoC architecture

Refan, Fatemeh, Kabiri, Parisa, Alemzadeh, Homa, Prinetto, Paolo, Navabi, Zainalabedin

Year:

2008

Language:

english

File:

PDF, 236 KB

english, 2008

33

[Society of Petroleum Engineers SPE Annual Technical Conference and Exhibition - San Antonio, Texas, USA (2006-09-24)] SPE Annual Technical Conference and Exhibition - Challenges for Everyday-NMR: An Operator's Perspective

Akkurt, Ridvan, Kersey, David G., Zainalabedin, Khalid Ahmed

Language:

english

File:

PDF, 471 KB

english

34

[IEEE 2016 IEEE East-West Design & Test Symposium (EWDTS) - Yerevan, Armenia (2016.10.14-2016.10.17)] 2016 IEEE East-West Design & Test Symposium (EWDTS) - Universal mitigation of NBTI-induced aging by design randomization

Jenihhin, Maksim, Kamkin, Alexander, Navabi, Zainalabedin, Sadeghi-Kohan, Somayeh

Year:

2016

Language:

english

File:

PDF, 220 KB

english, 2016

35

Digital Design and Implementation with Field Programmable Devices || Logic Design Concepts

Navabi, Zainalabedin

Year:

2005

Language:

english

File:

PDF, 2.02 MB

english, 2005

36

[IEEE 21st International Conference on VLSI Design (VLSID 2008) - Hyderabad, India (2008.01.4-2008.01.8)] 21st International Conference on VLSI Design (VLSID 2008) - An NoC Test Strategy Based on Flooding with Power, Test Time and Coverage Considerations

Sedghi, Mahshid, Koopahi, Elnaz, Alaghi, Armin, Fathy, Mahmood, Navabi, Zainalabedin

Year:

2008

Language:

english

File:

PDF, 786 KB

english, 2008

37

[IEEE Design, Automation & Test in Europe Conference - Nice, France (2007.04.16-2007.04.20)] 2007 Design, Automation & Test in Europe Conference & Exhibition - Using the Inter- and Intra-Switch Regularity in NoC Switch Testing

Hosseinabady, Mohammad, Dalirsani, Atefe, Navabi, Zainalabedin

Year:

2007

Language:

english

File:

PDF, 259 KB

english, 2007

38

[IEEE 13th IEEE International On-Line Testing Symposium (IOLTS 2007) - Crete, Greece (2007.07.8-2007.07.11)] 13th IEEE International On-Line Testing Symposium (IOLTS 2007) - Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC

Hosseinabady, Mohammad, Neishaburi, M.H., Navabi, Zainalabedin, Benso, Alfredo, Carlo, Stefano Di, Prinetto, Paolo, Natale, Giorgio Di

Year:

2007

Language:

english

File:

PDF, 220 KB

english, 2007

39

[IEEE Conference Publications Design, Automation and Test in Europe - Grenoble, France (2015.03.9-2015.03.13)] Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 - Power-Aware Online Testing of Manycore Systems in the Dark Silicon Era

Haghbayan, Mohammad-Hashem, Rahmani, Amir-Mohammad, Fattah, Mohammad, Liljeberg, Pasi, Plosila, Juha, Navabi, Zainalabedin, Tenhunen, Hannu

Year:

2015

Language:

english

File:

PDF, 230 KB

english, 2015

40

Self-Adjusting Monitor for Measuring Aging Rate and Advancement

Sadeghi-Kohan, Somayeh, Kamal, Mehdi, Navabi, Zainalabedin

Journal:

IEEE Transactions on Emerging Topics in Computing

Year:

2017

Language:

english

File:

PDF, 1.38 MB

english, 2017

41

[IEEE 2012 21st Asian Test Symposium (ATS) - Niigata, Japan (2012.11.19-2012.11.22)] 2012 IEEE 21st Asian Test Symposium - A Probabilistic and Constraint Based Approach for Low Power Test Generation

Sabaghian-Bidgoli, Hossein, Namaki-Shoushtari, Majid, Navabi, Zainalabedin

Year:

2012

Language:

english

File:

PDF, 436 KB

english, 2012

42

[IEEE Test Symposium (EWDTS) - Lviv, Ukraine (2008.10.9-2008.10.12)] Proceedings of IEEE East-West Design & Test Symposium (EWDTS'08) - System level hardware design and simulation with SystemAda

Mahani, Negin, Mokri, Parnian, Navabi, Zainalabedin

Year:

2008

Language:

english

File:

PDF, 79 KB

english, 2008

43

[IEEE 2015 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) - Napoli, Italy (2015.4.21-2015.4.23)] 2015 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) - Aging in digital circuits and age monitoring: Object-oriented modeling and evaluation

Sadeghi-Kohan, Somayeh, Kamran, Arezoo, Forooghifar, Farnaz, Navabi, Zainalabedin

Year:

2015

Language:

english

File:

PDF, 616 KB

english, 2015

44

[IEEE 2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) - Novi Sad, Serbia (2020.4.22-2020.4.24)] 2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) - DiBA: n-Dimensional Bitslice Architecture for LSTM Implementation

Roodsari, Mahboobe Sadeghipour, Ali Saber, Mohamad, Navabi, Zainalabedin

Year:

2020

File:

PDF, 1.08 MB

2020

45

[IEEE 2011 IEEE 20th Asian Test Symposium (ATS) - New Delhi, India (2011.11.20-2011.11.23)] 2011 Asian Test Symposium - Adaptation of Standard RT Level BIST Architectures for System Level Communication Testing

Nemati, Nastaran, Navabi, Zainalabedin

Year:

2011

Language:

english

File:

PDF, 265 KB

english, 2011

46

Synthesis of VLSI circuits from behavioral descriptions

Zainalabedin Navabi, John Spillane

Journal:

Microelectronics Journal

Year:

1991

Language:

english

File:

PDF, 352 KB

english, 1991

47

Generating gate level two phase dynamic MOS logic from AHPL

Zainalabedin Navabi

Journal:

Microprocessing and Microprogramming

Year:

1985

Language:

english

File:

PDF, 414 KB

english, 1985

48

[IEEE 21st International Conference on VLSI Design (VLSID 2008) - Hyderabad, India (2008.01.4-2008.01.8)] 21st International Conference on VLSI Design (VLSID 2008) - Stall Power Reduction in Pipelined Architecture Processors

Lotfi-Kamran, Pejman, Rahmani, Amir-Mohammad, Salehpour, Ali-Asghar, Afzali-Kusha, Ali, Navabi, Zainalabedin

Year:

2008

Language:

english

File:

PDF, 1.21 MB

english, 2008

49

[IEEE 2014 15th International Symposium on Quality Electronic Design (ISQED) - Santa Clara, CA, USA (2014.03.3-2014.03.5)] Fifteenth International Symposium on Quality Electronic Design - Assertion-based verification for system-level designs

Sohofi, Hassan, Navabi, Zainalabedin

Year:

2014

Language:

english

File:

PDF, 528 KB

english, 2014

50

[IEEE 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007) - Lubeck, Germany (2007.08.29-2007.08.31)] 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007) - On-Chip Verification of NoCs Using Assertion Processors

Kakoee, Mohammad Reza, Neishaburi, M.H, Daneshtalab, Masoud, Safari, Saeed, Navabi, Zainalabedin

Year:

2007

Language:

english

File:

PDF, 444 KB

english, 2007

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